The present disclosure relates to methods for making electrically conductive electrodes for electronic devices, such as organic thin-film transistors (“OTFT”s), with no or minimum contact resistance between the electrodes and the semiconductor. The present disclosure also relates to electronic devices produced by such methods.
Thin film transistors (TFTS) are fundamental components in modern-age electronics, including, for example, sensors, image scanners, and electronic display devices. TFT circuits using current mainstream silicon technology may be too costly for some applications, particularly for large-area electronic devices such as backplane switching circuits for displays (e.g., active matrix liquid crystal monitors or televisions) where high switching speeds are not essential. The high costs of silicon-based TFT circuits are primarily due to the use of capital-intensive silicon manufacturing facilities as well as complex high-temperature, high-vacuum photolithographic fabrication processes under strictly controlled environments. OTFTs offer not only much lower manufacturing costs, but also appealing mechanical properties such as being physically compact, lightweight, and flexible.
OTFTs are generally composed of a supporting substrate, three electrically conductive electrodes (gate, source and drain electrodes), a channel semiconductor layer, and an electrically insulating gate dielectric layer separating the gate electrode from the semiconductor. The channel semiconductor is in turn in contact with the source and drain electrodes. The materials used to make the OTFTs, and the interfacial properties between various layers of semiconductor, dielectric, and electrodes will affect the performance of the OTFTs. Accordingly, a great deal of recent effort has been devoted to improving the TFT device performance through new semiconductor materials design, improvement of semiconductor ordering, and optimization of semiconductor and dielectric interface, etc. However, little attention has been given to the optimization of interfacial properties between the source/drain electrodes and the semiconductor layer, which often give rises to contact resistance. The contact resistance between the semiconductor and the electrodes can dominate the transport properties of the TFT devices. Minimizing the contact resistance can therefore lead to improvement of TFT performance. There is therefore a critical need to develop new methods, addressed by embodiments of the present disclosure, for minimization of the contact resistance between the semiconductor and the electrodes.